## About

I'm an Electrical Engineering student at Georgia Tech working in FPGA, RTL, and digital system design. I'm interested in low-latency, high-throughput systems. I enjoy working with both hardware and software, designing custom logic. building testbenches, and creating tooling. When I'm not working on hardware, I'm usually tweaking my neovim config, cooking, or playing chess.

Feel free to reach out - amanjikian3 [at] gatech [dot] edu

┌─ Latest Error I've Encountered

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## Featured Projects

### RISC-V Single-Cycle CPU

A single-cycle RISC-V processor core supporting the full RV32I instruction set, including ALU ops, branching, and memory access, with instruction-level testing with cocotb.

SystemVerilogcocotbVerilator

### Senence Clustering

JavaScript platform using OpenAI + TensorFlow for semantic clustering of 5,000+ sentences. Saved 100% of cost by leveraging open-source models. Used K-means, DBSCAN, and HAC, visualized with elbow method.

OpenAITensorFlowPython

## What I use

Languages & HDL

  • - SystemVerilog
  • - Verilog
  • - VHDL
  • - C++
  • - Python
  • - Bash
  • - MATLAB
  • - Tcl

FPGA & ASIC Tooling

  • - Vivado
  • - Quartus
  • - Lattice
  • - Verilator
  • - Static Timing Analysis

Systems & Infrastructure

  • - Linux
  • - Git
  • - Docker
  • - Networking (TCP/UDP)
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